1. Field of the Disclosure
The present disclosure relates generally to electronic devices, and more particularly, to phase locked loop devices.
2. Description of the Related Art
Phase locked loop devices are used in a wide variety of electronic devices. For example, data processing devices typically employ one or more phase locked loops to generate clock signals based on a reference clock signal provided by a crystal oscillator. In some data processing devices, different phase locked loops are used to generate different clock signals for different modules of the device. For example, a data processing device with multiple processor cores can employ different phase locked loops to generate different clock signals for each processor core, and to generate clock signals for other device modules, such as a memory controller. However, the operation of a phase locked loop device can be adversely affected by power fluctuations and other transient noise signals, resulting in excessive phase error, jitter, drift, and other undesirable perturbations in the output of the phase locked loop. Such perturbations can cause undesirable behavior in modules that use the output of the phase locked loop to synchronize their operations.